technical data power supply control with built-in watchdog timer ordering information kk 1232n plastic kk 1232d soic t a = -40 to 8 5 c for all packages . kk 1232 is designed to monitor power supply within the system of reset signal generation for m i croprocessors. it is used in m onitor system s for controlling various processes and entities. packaged in 8-pin sop or dip. features: ? rated supply voltage 5.0 v ? accurate 5% or 10% m i croprocessor power supply m onitoring ? program m i ng of watchdog tim er overflow tim e ? generation of reset signals at power on for correct m i croproces sor start. KK1232 the chip contains reference voltage source, analog com p arator, w a tchdog tim er, circuit for m onitoring power supply deviation accuracy. . functions: ? reset signal generation after power failure/ error ? reset signal generation from external ?reset? pushbutton ? reset signal generation from watchdog tim er fig 1 ? pin assignment 06 rst 05 rst gnd 04 pbrst 01 td 02 tol 03 07 st 08 vcc tabl e 1 ? absol u t e m a xi m u m rat i ngs typical sy m bol param e ter min max un its v suppl y vol t a ge - 7.0 v v ih input vol t a ge, hi gh l e vel - 7.0 v v il input vol t a ge, l o w l e vel -1.0 - v a operat i ng t e m p erat ure range -40 +85 t stg st orage t e m p erat ure -60 +125 1
KK1232 table 2 ? recom m e nded operating conditions typical sy m bol param e ter min max un its v suppl y vol t a ge 4.5 5.5 v v ih input vol t a ge, hi gh l e vel 2.0 u + 0 . 3 v v il input vol t a ge, l o w l e vel -0.3 0.8 v a operat i ng t e m p erat ure range -20 +70 table 3 dc electrical characteristics (t am b = -40 to +85 ) typical sy m b o l p a r a m e t e r t e s t c o n d i t i o n s mi n m a x un its i lil1 input leakage current, low level, st, tol v cc =5 v 10% , v il =0 v - - 1 i lil2 input leakage current, low level, td v cc =5 v 10% , v il =0 v - - 3 0 0 i lil3 input leakage current, low level, pbrst v cc =5 v 10% , v il =0 v - - 1 0 0 0 i lih1 input leakage current, high level, st, tol v cc =5 v 10% , v ih =v cc - 1 i lih2 input leakage current, high level, td v cc =5 v 10% , v ih =v cc - 3 0 0 i oh output current, high level, rst v cc =5 v 10% , v oh =2.4 v - 8 - i ol output current, low level, rst, rst v cc =5 v 10% , v ol =0.4 v 8 - m v oh output voltage, high level, rst v cc =5 v 10% , i oh = -500 v -0.5 - v v oh1 output voltage, high level,- rst v cc =2 v, i oh = -500 v -0.5 - v v ol output voltage, low level, rst v cc =2 v, i ol =1 m - 0 . 4 v i operating current v cc =5 v 10% - 2 m v cc tp1 v cc trip point tol = gnd 4 . 5 4 . 7 4 v v cc tp2 v cc trip point tol = v cc 4 . 2 5 4 . 4 9 v 2
KK1232 table 4 ? ac electrical characteristics ( am b = from -40 to +85 ) typical sy m b o l p a r a m e t e r t e s t c o n d i t i o n s mi n m a x un its t td1 watchdog tim er overflow tim e v cc =5.0 v 10% t st 20 ns td = gnd 6 2 . 5 2 5 0 ms t td2 td disconnected 250 1000 ms t td3 t d = v cc 5 0 0 2 0 0 0 ms t pdly pbrst stable low to rst and rst v cc =5.0 v 10% t pb 20 m s - 2 0 ms t rst reset active tim e v cc =5.0 v 10% t pb 20 m s 2 5 0 1 0 0 0 ms t rpd v cc fail detect to rst and rst v cc =from 5.0 to 4.0 v t f 10 s - 1 7 5 s t rpu v cc detect to rst and rst transition v cc = from 5.0 to 4.0 v t r 1 s 2 5 0 1 0 0 0 ms table 5 ? pin description pi n s y m bol descri pt i o n 0 1 p b r s t pushbut t on reset i nput 02 td tim e delay set 03 tol sel ect s 5% or 10% v cc detect 0 4 g n d g r o u n d 05 r s t r e set out put (act i v e hi gh) 06 r s t r e set out put (act i v e low, open drai n) 0 7 s t st r o b e input 0 8 v cc suppl y out put from vol t a ge source 3
t pb 20 m s t pdly 20 m s 250 m s t rst 1000 m s v il v ih t rst t pb t pdly ______ pbrst ____ rst rst fi g. 2 ? ti m i ng di agram of form i ng reset si gnal from ext e rnal pb r s t cont rol but t on t st m ax mi n t td1 - t td3 rst ___ st indet e rm i n at e st rob valid stro b inval i d st rob t st 20 ? 62.5 m s t td1 250 m s 250 m s t td2 1000 m s 500 m s t td3 2000 m s fi g. 3 ? ti m i ng di agram : st robe i nput 4 KK1232
t f 10 s t rpd 175 s fi g. 4 ? ti m i ng di agram : power error / down t o v cctp t r 1 s 250 m s t rpu 1000 m s ____ rst rst v ol v oh t rpd t r t rpu v oh v ol rst rst v cc v cctp 4.75 v 4.25 v v cc 4.25 v 4.5 v 4.75 v t f fi g. 5 ? ti m i ng di agram : power-up/ st abl e 5 KK1232
fi g.6 b l ock di agram r e ferance vol t a ge source vcc tolerance bias w a t c hdog t i m er rst rst gnd pbrst td st tol v cc + - KK1232 fi g.7 appl i cat i on c i rcui t : w a t c hdog ti m e r 6 KK1232
n s u f f i x p l as t i c di p ( m s ? 00 1b a ) sy m b o l m i n m a x a 8. 51 10. 16 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d su f f i x so i c (m s - 0 1 2 a a) sy m b o l m i n m a x a 4. 8 5 b 3. 8 4 c 1. 35 1. 75 d 0. 33 0. 51 f 0. 4 1 . 2 7 g h j 0 8 no t e s : k 0. 1 0 . 2 5 1. d i m e n s i o ns a a n d b d o no t i n c l ud e m o l d f l a s h o r p r ot r u s i on . m 0. 19 0. 25 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e p 5. 8 6 . 2 fo r a ; fo r b ? 0. 25 m m ( 0 . 010) p e r s i d e . r 0. 25 0. 5 1. 27 5. 72 d i me n s i o n , mm d i me n s i o n , mm 2. 54 7. 62 a b h c k c m j f m p g d r x 4 5 se a t i n g pl a n e 0 . 25 (0 . 0 10 ) m t -t - 1 8 4 5 l h m j a b f g d se a t i n g pl a n e n k 0 . 2 5 ( 0 .01 0 ) m t -t - c 1 8 4 5 7 KK1232
|
